Digit order and decimal point display system and circuit therefor



Sept; 1', 1970 3 SheetsSheet l 1 Filed June 30,

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Filed June 30, 1967 '3 Sheets-Sheet 2 W] U3 76 7? :LJ" I Z 8O Y J no" 70 05cm. WHOLE 221.223: m2;

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Filed June 30, 196.7

United States Patent O 3,526,887 DIGIT ORDER AND DECIMAL POINT DISPLAY SYSTEM AND CIRCUIT THEREFOR Ernst R. Erni, Redwood City, Calif., assignor to The Singer Company, a corporation of New Jersey Filed June 30, 1967, Ser. No. 650,315 Int. Cl. G06c 19/02; G08b 23/00 US. Cl. 340324 11 Claims ABSTRACT OF THE DISCLOSURE An operators panel for manual entry and functional control of data in a data handling apparatus is provided with a horizontal row of lamps for visually indicating digit or numeral positions, both right and left of a decimal point lamp, of a number that has been entered into the apparatus by manual operation of selected ones of ten numeral keys and a decimal point key prior to operation of selected ones of function initiating keys. A logic systemfor controlling, in proper order, the illumination and extinguishment of the lamps is disclosed in addition to a circuit for turning on and extinguishing the lamps according to control signals generated by the logic system.

BACKGROUND, FIELD OF INVENTION This invention pertains to a system for visually indicating the rank or digit positions in a number that has been entered by manual operation of selected numeral keys of a ten-key keyboard, and in particular relates to a system for illuminating individual whole portion of a number digit position indicating lamps, a decimal point indicating lamp, and fractional portion of a number digit position indicating lamps according to the order of manual key operation, and a circuit for controlling the illuminating order to said lamps.

BACKGROUND, PRIOR ART The usual mechanically operated ten-key calculating machines, such as shown and described in U.S. Pat. No. 3,081,938, R. Walther et al., is usually provided with a most-significant-digit position indicating lever overlying a plate upon which is printed digit position indicating marks. As a number, including whole and decimal fraction portions, is set up for entry in the calculator by successive manual operation of selective ones of the digit keys, the mentioned lever moves to the left across the mark imprinted plate. The location of the lever with respect to the printed marks will indicate how many numeral keys have been operated and the location of the most significant digit of the number. Thus, the human operator can visually verify that the required set of numeral keys have been operated to fully set up and/or enter the desired number upon subsequent operation of a function key such as, for example, ADD, SUBTRACT, MULTIPLY, DIVIDE, SQUARE ROOT, etc. It is quite easy to fail or forget to manually operate the required set of numeral keys when the operator is required to include in the number being set up, extra Zeros to the right of a number being read from a work sheet. Such addition of extra zeros to the right is encountered when, for example, numbers having decimal fraction portions are to be added or subtracted, and some of the numbers have more least significant digits than others. In such case the numeral key must be operated additional times to effectively shift the number in the calculator so that individual numerals having a particular decimal or digit weight are lined up with corresponding digits of the numbers previously entered or subsequently to be entered. As an illustration, when adding the number 12.3 to the number 456.78, it is necessary to set up and enter the number 12.30; i.e., the

3,526,887 Patented Sept. 1, 1970 0 numeral key must be operated after the 3 numeral key in order that 1 (tens digit), 2 (units digit), and 3" (tenths digit) be lined up with corresponding tens digit (5), units digit (6) and tenths digit (7) of the previously or subsequently entered number 456.78. From the foregoing illustrative example it can be seen that there is required a substantial amount of mental wonk on the part of the operator to properly set up numbers on a ten-key keyboard for proper entry into a calculator. It can thus be appreciated that it is quite easy to fail to operate numeral keys the required times, or too many times and it can be appreciated that it is easy to forget how many times numeral keys must be operated to properly set up any one number.

Some ten-key keyboard data handling devices (both electronically and mechanically operated) have an additional set of operational keys wherein automatic alignment of digit positions with respect to a fixed or movable decimal point is accomplished if desired. However, even in these more sophisticated devices it is desirable that a visual indication of the actual times the numeral keys have been operated be provided.

Mechanically operated calculators, and the like, accomplish the digit position indication by complex mechanical means. It is desirable in such systems to provide for digit position indicating means having a minimum of parts so as to obviate as far as possible the inherent problems of maintenance, reliability and space encountered with mechanical moving parts.

Frequently, electronic data handling systems have a manually operated ten-day keyboard for entry of data into the system, but for reasons of economics have no visual display of the data set up through the keyboard until the data is actually entered into the system by operation of a function key such as, for example, ADD, SUB- TRACT, etc. In such systems, it is highly desirable to have a simple visual display to indicate how many numeral keys have been operated prior to operation of the chosen function key.

SUMMARY Briefly stated, the present invention is accomplished by providing a battery of lamps on the front panel of a calculator keyboard, one lamp of which represents a decimal point, a first group of lamps, to the left of the decimal point representing lamp, representing digit positions of the integer or whole portion of a number, and a second group of lamps, to the right of the decimal point representing lamp, for representing the digits of the decimal fraction portion of a number, and means for causing selective ones of the lamps to be illuminated as a number is set up and entered by operation of selected ones of ten numeral keys. The control means includes means for generating an electrical signal each time a numeral key is actuated, and each time a special key representing a decimal point is actuated. The numeral key actuation indicative signals generated prior to actuation of the decimal point key are applied to a whole or integer portion lamp control which causes turn-on or illumination of successive ones of the whole number group of lamps in a direction leftwardly of the decimal point indicative lamp. The decimal point key actuation indicative signal is applied to a decimal point/decimal fraction portion lamp control which causes turn-on or illumination of the decimal point indicative lamp, and conditions itself to be responsive to subsequent numeral key actuation signals so as to illuminate successive ones of the decimal portion lamps.

In this manner, there will be indicated on the lamp display panel a set of illuminated lamps indicative of the effective digit positions of the number that was set up by operation of the numeral keys and decimal point key of the keyboard. Upon operation of any of the keyboards function keys, such as ADD, SUBTRACT, CLEAR, etc., the number will be operated upon in the data handling portion of the system, and all the illuminated digit position lamps will be extinguished.

It is, therefore, an object of the present invention to provide a system for indicating the maximum and minimum digit positions of a number set-up and entered on a keyboard of a data handling apparatus.

Another object of the present invention is to provide an improved visual display for the digits set-up by a ten-key keyboard of a data handling apparatus.

Yet another object of the present invention is to provide an improved lamp illuminating control circuit for a keyboard digit set-up visual display.

The features of novelty that are considered characteristic of this invention are set forth with particularity in the appended claims. The organization and method of operation of the invention may best be understood from the following description when read in connection with the accompanying drawings.

BRIEF DESCRIPTION OF THE FIGURES FIG. 1 is a perspective view of a ten-key keyboard having the digit position indicating lamps of the present invention.

FIG. 2 is a simplified schematic of the digit position indicating bank of lamps of the present invention demonstrating the sequence of lamp illumination when the whole or integer portion of a number is setup by operation of the digit keys.

FIG. 3 is a simplified schematic of the digit position indicating bank of lamps of the present invention demonstrating the sequence of lamp illumination when the decimal fraction portion of a number is set-up by operation of the digit keys.

FIG. 4 is a simplified schematic of the digit position indicating bank of lamps of the present invention demonstrating the sequence of lamp illumination when the number having both a whole or integer portion and a decimal fraction portion is set-up by operation of the digit keys.

FIG. 5 is a logic schematic of the present invention.

FIG. 6 is a circuit diagram of the lamp control circuit of the present invention.

DESCRIPTION OF A PREFERRED EMBODIMENT In FIG. 1, there is shown an enclosure, or cabinet, 10 having a keyboard 11 for numerical data set-up and entry control and function or operation control in a data processing portion which may or may not be contained within the enclosure. Included as part of the keyboard 11 is a bank, or matrix, of ten manually operable numeral keys, or switch means, 12 to 21, individual ones of which have permanently imprinted, or otherwise suitably fixed thereto, one of the numerical symbols one (1) to zero or naught (0). The arrangement of the numeral keys is a well-known pattern commonly referred to by the term ten-key keyboard. Immediately to the right of the zero (0) numeral key 21 is a manually operable decimal point key, or switch means, 22.

A row or plurality of digit position indicative lamps, or indicator means, 28 are mounted near the top edge portion of the keyboard 11. One of the lamps identified in FIG. 1 by the legend DP is representative of a decimal point in a compound number which, for the sake of simplicity, is hereinafter simply termed number, having a whole, or integer, portion (numerals to the left of the decimal point) and a decimal fraction portion (numerals to the right of the decimal point). The ten lamps to the left of the decimal point lamp DP are identified in FIGS. 1 to 4 by legends which are abbreviations of their digit representing value or weight with respect to the decimal point lamp DP; i.e., immediately to the left of the decimal point lamp DP is the units position lamp U, the next succeeding one is the tens position lamp T, etc., up to the billions position lamp B.

Likewise, the four lamps to the right of the decimal point lamp DP are identified in FIGS. 1 to 4 by legends which are abbreviations of their digit representing value with respect to the decimal point lamp DP, i.e., immediately to the right of the decimal point lamp DP is the tenths position lamp Ts, the next succeeding one is the hundredths position lamp Hs, etc., down to the ten thousandths position lamp Tths.

Immediately to the right of the 3 and 6- numeral keys 14 and 16, respectively, is a manually operable function key 24- for causing the operational function of addition of the previously entered number to a previously accumulated subtotal already present in the data processing section of the apparatus.

Likewise, immediately to the right of the 9 numeral key 20 is a manually operable function key 26 for causing the operational function of subtraction of the previ ously entered number from a previously accumulated subtotal already present in the data processing section of the apparatus.

It will be understood by those familiar with data handling devices such as adding machines, calculators, electronic data processors and the like, that the mentioned previously accumulated subtotal may be a zero value, as when, for example, the first number in an addition or subtraction problem is entered into the data handling apparatus.

At the left of the bank of numeral keys is a manually operable CLEAR function key 30. Operation of the CLEAR key will simply cancel the number previously set-up and entered by the numeral keys. Operation of any of the three previously described function keys 24, 2'6 and 30 will cause extinguishment of all the digit position indicative lamps and decimal point lamp that were illuminated by the immediately previous operation of the numeral keys, as will now be more fully described.

Successive operation of selected ones of the numeral keys 12 to 21 prior to operation of the decimal point key 22 will enter such numerical values into the data processing section. Also, digit position indicative lamps corresponding to the whole, or integer, portions of a number will be illuminated. The illumination of such lamps will take place in a right-to-left order as shown in FIG. 2 by arrow 32. The lamps are turned on or illuminated oneby-one beginning with the units position lamp U, then the tens position lamp T, etc., as successive selected ones of the numeral keys 12 to 21 are operated. In FIG. 2 there is shown, by way of example, illuminated lamps U, T, and H and the remainder of the lamps nonilluminated which will result from successive operation of three of the numeral keys 12 to 21 for entry of a whole number having a numeral in the hundreds, tens, and units position. From the above it will be clear that by visual inspection of the lamp row 28 a check on the actual times that numeral keys have been operated can be readily accomplished, and thus a check on the order of magnitude (maximum digit position) of the number entered can be rapidly accomplished.

If, however, the decimal point key 22 is operated prior to operation of any of the numeral keys, the decimal point lamp DP will be illuminated as indicated in FIG. 3. Then, successive operation of selected ones of the numeral keys 12 to 21 will enter a number having only a decimal fraction portion into the data processing section. At the same time, lamps corresponding to the decimal fraction digits (right-of-decimal point) will be illuminated. The illumination of such lamps will take place in a left-to-right order as shown in FIG. 3 by arrow 34. The lamps are turned on or illuminated one-by-one beginning with the tenths position lamp Ts, then the hundredths position lamp Hs, etc., as successive selected ones of the numeral keys 12 to 21 are operated.

In FIG. 3 there is shown, by way of example, illuminated lamps DP, Ts, Hs and Ths and the remainder of the lamps nonilluminated, which will result from operation of first, the decimal point key 22, and then successive operation of three of the numeral keys 12 to 21 for entry of a decimal fraction number having a numeral in the tenths, hundredths, and thousandths position.

In FIG. 4 there is shown, by way of example, the pattern of illuminated and nonilluminated lamps that will result from entry of a number having a three-digit whole or integer portion, a decimal point and a three-digit decimal fraction portion.

The actual construction and mounting of the numeral keys 12 to 21, decimal point key 22, and function control keys 24, 26 and 30 are not important to the present invention; hence complete details are not set forth but will occur to those skilled in the art to which the present disclosure pertains. Further, generation, transmission and accumulation of electrical or numerical data indicative signals upon each operation of the numerical keys, decimal point key and function control keys are not important to the present invention and no details are given herein.

There is shown in FIG. 5, by way of example, a simplified logic diagram of an embodiment for accomplishing the present invention. Each numeral key, or switch means, 12 to 21 includes a means for generating an electrical signal, indicating operation of the key; such means is shown in FIG. 5, by way of example, by movable contacts 42 to 51, individual ones of which are associated with individual numeral keys, and associated fixed contacts 52 to '61, respectively. Each of the fixed contacts are electrically connected together, while each of the movable contacts are electrically connected together.

The decimal point key, or switch means 22, includes a movable contact 62 and a fixed contact 63 for generating an electrical signal indicating operation of such key. Likewise, each of the function keys 24, 26 and 30 include movable contacts 64, 66 and 70, respectively, plus fixed contacts 74, 76 and 80, respectively. Each movable contact 42 to 51, 64, 66 and 70 are connected to a common source of electrical power indicated by lead 68. It will be clear to those skilled in the art to which the present disclosure pertains, that the polarity and magnitude of electrical power furnished to lead 68 from a power supply (not shown) is a matter of choice determined by the power requirements of well-known individual logic components comprising the system described in further detail below.

The function keys fixed contacts 74, 76 and 80 are each electrically connected to a common output lead 72. Momentary operation of any one of the function keys will cause a momentary electrical signal to be transmitted on lead 72. This signal is utilized as a clear or reset signal for placing other logic components or subsystems, to be described below, in an initially clear state, or condition, in anticipation of a complete operating cycle.

A whole number portion, or left-of-decimal point lamp control means or register 75, includes a first output lead 77 and a second output lead 78. The register 75 may be any desired bistable device switchable between two stable states or conditions. In FIG. 5, the register 75 is shown as a typical electronic flip-flop, having a reset input electrically connected to the aforementioned function keys common output lead 72. Register 75 will thus be placed in the cleared or reset condition by the clear signal which is generated by operation of any of the function keys.

Output lead 77 from the register 75 is connected to one input of a two input logic AND gate '81, while the other output lead 78 is connected to one input of another two input AIND gate 82. When the register 75 1s 1n 1ts reset condition, an electric enabling, or as is commonly termed, true signal of a first polarity and/ or magnitude is present on output lead 77, while at the same time an electrical disabling, or, as is commonly termed, false signal, of

a second polarity and/or magnitude is present on the other output lead 78. The mentioned true signal on lead 77 enables AND gate 81 While the mentioned false signal on lead 78 disables AND gate 82. With such enabling signal on lead 77, AND gate 81 will transmit a true signal on its output lead 84 if and when another true signal of like polarity and/or magnitude is present on its other or second input lead. On the other hand, AND gate 82 will transmit a disabling or false signal on its output lead 86 so long as the signal furnished over lead 78 is false, no matter what the state of the signal furnished to its other or second input.

Thus, it can be readily understood that immediately after any function key 24, 26 or 30 is operated, AND gate 81 is enabled while, at the same time, AND gate 82 is disabled. Immediately after any one of function keys is operated, a new number, which may or may not include both a whole or integer portion, and a decimal fraction portion, is set-up by successive operation of selected ones of the numeral keys 12 to 21 and decimal point key. The system of the present invention assumes that a whole or integer portion number is to be set-up and will operate accordingly until the decimal point key is operated. Therefore, the resetting or clearing of the control register 75, as described above, automatically conditions the system for illumination of the whole or integer portion of the digit position indicative lamps 28.

Now, assuming that a first numeral key is operated (prior to operation of the decimal point key), an electrical true signal is transmitted over a lead 88, which lead is common to all the numeral keys fixed contacts 52 to 61 and is electrically coupled to the second input of AND gate 81. This true signal will cause an electrical true signal to be transmitted over output lead 84 of AND gate 81 to an input of a multistage indicator lamp state control means or sequencer 90.

The sequencer 90 may be any one of well-known devices that have a plurality of bistable stages that respond to successive pulses in a train or sequence of input pulses by switching successive ones of the stages from their first or off condition to their second or on condition and permit the previously turned-on stages to remain in their on condition. Such a device may be, for example, a shift register so arranged that input pulse cause the first stage to be turned on and succeedi-ng stages to be changed to a new stage corresponding to the state of the immediately preceding stage, as is Well-known to those skilled in the art to which the present disclosure pertains.

As shown in FIG. 5, each stage of the sequencer 90 is illustrated as a rectangle and includes an associated output lead coupled to an associated digit position indicative lamp. It should also be noted that the previously mentioned reset or clear signal generated by operation of any one of the function keys is also transmitted via lead 72 to the sequencer 90, thereby placing all of its stages in the reset or off condition. When any or all stages of the sequencer are in the off condition, each lamp associated with the respective stages is also placed in its nonilluminated condition.

The first input pulse or true signal on lead 84 to the sequencer 90 causes the first stage, i.e., the stage associated with the units lamp U, to be turned on thereby causing the units lamp U to be illuminated and to remain illuminated until such stage is reset as described previously.

Upon the next successive operation of any one of the numeral keys 12 to 21, another electrical true signal will be transmitted from AND gate 81 to the input of the sequencer 90 and will cause its second stage, i.e., the stage associated with tens position lamp T, to be turned on, thereby causing illumination of the tens lamp T, while maintaining the first stage in the on condition 7 and, of course, maintaining the units position lamp U illuminated.

Continued successive operations of numeral keys prior to operation of the decimal point key 22 will cause illurnination of successive ones of the remainder of the whole or integer portion digit position indicating lamps in the right-to-left direction, as viewed in FIGS. 1, 2, 4, and in a manner like that just described for the first two lamps U and T.

There will now be described that portion and feature of the present invention involving operation of the decimal point key 22, and subsequent operation of successive ones of the numeral keys for setting up a decimal fraction portion of a number. It should be borne in mind that the description that follows herein applies equally well to set-up of a number having a whole, or integer, portion previously set-up as described above, or a number having only a decimal fraction portion.

As shown in FIG. 5, there is provided a second multistage lamp state control means, or sequencer, 92. This sequencer controls operation, or illumination, of the decimal point lamp DP, and the decimal fraction position indicating lamps in response to input pulses, or signals, from AND gate 82 in the same manner as the response of the first described sequencer 90.

It will be recalled that when the register 75 is in the reset condition, the AND gate 82 is disabled by the false signal on lead 78. A means for switching or changing the state of register 75 so that AND gate 82 is enabled is provided. As shown in FIG. 5, there is provided an enabling means for causing the register 75 to be switched upon the first operation of the decimal point key 22. The enabling means includes a control means, or register, 94. This control means is placed in a cleared, or reset, state by the clear signal transmitted on lead 72 by operation of the function keys 24, 26 or 30. When the control means 94 is in its cleared condition an electrical true signal is furnished over a lead 96 to one input of a two-input AND gate 98. The other input of the AND gate 98 is connected, via a lead 100, with the fixed contact 63 of the decimal point key 22. When the decimal point key is first operated, an electrical true signal is transmitted over lead 100 to AND gate 98, thereby causing a true signal to be transmitted via output lead 102 to one input of a logic OR gate 104. The enabled OR gate 104 responds to such true signal and transmits a true signal over output lead 106 to the second input of AND gate 82.

Lead 102, from AND gate 98 is also connected to one state changing, or switching, input of register 75. The mentioned true signal transmitted from AND gate 98 causes the register 75 to switch to its other stable state or condition, which, in the case of a flip-flop, is generally termed the set state. Upon being placed in the set state the signal on leads 77 and 78 are changed, or reversed; the signal on lead 77 is now false and the signal on lead 78 is now true. Thus, the true signal on output lead 78 now enables AND gate 82, thereby permitting that gate to respond to the true signal on lead 106 (from OR gate 104, as described above) and transmit a true signal, or pulse, over lead 86 to the input of the sequencer 92. The sequencer 92 responds to the thus formed first input pulse and turns on the first, or decimal point, lamp DP.

A means for preventing generation and transmission of a signal on lead 102 upon accidental or erroneous second operation of the decimal point key 22 prior to operation of a function key is a feature of the present invention. This is accomplished by providing for changing the state of control means 94 to its disabling state by the first operation of the decimal point key 22 at a time subsequent to generation and transmission of the first input pulse to the sequencer 92. As illustrated in FIG. 5, the lead 100 is also coupled to the input of an electrical signal delay means 108. The output of the delay means is coupled in a flip-flop could be the set input. The electrical signal applied to the input of the delay means, upon actuation of the decimal point key, will be transmitted from the output of the delay means only after passage of a predetermined time according to the design of the delay means. Thus the control means 94 will not be changed from its cleared or reset state to its disabling or set state until some predetermined time, after the previously mentioned electrical true signal is generated and transmitted from AND gate 98 which signal causes an input signal to sequencer 92. Upon setting of the control means 94, the enabling or true signal on lead 96 to AND gate 98 is changed to a false or disabling signal; the AND gate is thereby disabled or blocked from transmitting any further output signals in response to further but erroneous or accidental operations of the decimal point key 22.

The logical false signal on lead 77 (from register 75) disables AND gate 80; no signals will be sent from gate 81 to the input of sequencer upon further operation of the numeral keys 12 to 21 during entry of the decimal fraction portion of the number being entered. However, as shown in FIG. 5, lead 8 8 is also coupled to an input of logic OR gate 104. Thus, each operation of the numeral keys will cause the OR gate to transmit a logical true signal over lead 106 to the one input of the logic AND gate 8 2. When this AND gate is enabled by setting or switching of register 75, as described previously in connection with the first operation of the decimal point key, further logical true signals on lead 88 generated by operation of numeral keys will cause logic AND gate 82 to transmit logical true signals over lead 86 to the input of sequencer 92. The sequencer 92 responds to such further successive true signals by effecting illumination of successive ones of the decimal fraction portion indicative lamps in a left-to-right or decreasing order of significance sequence, as demonstrated in FIG. 3.

After a number is fully entered through operation of the numeral keys 12 to 21 and/or decimal point key 22, a function key 24, 26 or 30 is operated. This will cause appropriate operations on the number, and clearing or reset of the present invention preparatory to another cycle of operation in the same manner as has been described above.

Another important feaure of the present invention is a circuit arrangement for accomplishing each of the sequencers 90 and 92. In FIG. 6 there is shown a circuit which is described hereinafter with reference to input pulses from lead 86, i.e., pulses that will cause illumination of the decimal point lamp DP and then succeeding ones of the decimal fraction portion digits indicative lamps. It will be understood by those skilled in the art that the sequencer 90 can be accomplished in the same manner.

The circuit for each stage of the sequencer 92 is shown in FIG. 6 as included with a dotted rectangle. The first stage associated with the decimal point lamp DP is shown along with the stage associated with the next succeeding lamp Ts, and the last lamp Tths. Stages not shown, but which would be between the lamps Ts and Tths are identical to the state associated with the lamp Ts.

Each stage includes an input diode 146, a silicon controlled rectifier 114, a diode 122, resistors 150, and capacitor 148.

In the quiescent state the voltage on lead 86- from AND gate 82 (FIG. 5) is at a positive value of about 0.4 Volt DC. or close to ground potential; the voltage at each cathode of diodes 146 is thus close to ground potential. In the quiescent state the voltage on line 72 from the function keys 24, 26 and 30 (FIG. 5) is close to ground potential. The base of PNP transistor 156, which is part of a reset or clear circuit, is biased negative relative to its emitter, thereby causing the transistor to conduct. In the conducting state, the voltage at the collector of transistor 156 is at approximately the same positive potential as supply terminal 141.

The anodes 'of each silicon controlled rectifier 114 are tied to the collector of transistor 156 and are at the same positive potential. 'Each cathode of each silicon controlled rectifier 114 is coupled to a positive voltage power supply terminal 140 through a respective relatively high resistance 150'; the potential at the cathodes of the silicon controlled rectifiers are thus negative with respect to their anodes. However, each silicon controlled rectifier is in the cutoff or nonconducting condition; there is no current through the silicon controlled rectifiers.

Each indicating lamp DP, Ts, Tths is in a series circuit with ground potential, a low value resistance 128 and the cathode of an associated silicon controlled rectifier 114. The potential due to resistances 150 and 128 is such that the voltage across the associated indicating lamps is not enough to cause the lamps to be illuminated. The control electrode of each silicon controlled rectifier 114 is connected to the cathode of an associated diode 122. The anodes of each diode 122 are connected to the anode of an associated respective input diode 146.

In the first stage of the sequencer, the anode of the diode 122a is coupled to the power supply terminal 140 through a resistance 120. In the first stage, the voltage at the anode of diode 122a and anode of diode 146a is at a value positive with respect to the voltage at the cathode of diode 122a. Current thus flows from lead 86 through diode 146a, through resistor 120 to lead 140.

The other succeeding stages of the sequencer have a diode 122, the cathode of which is connected to the control electrode of the associated silicon controlled rectifier,

while the anode is connected to the anode of the associated input diode 146 and through resistor 124 to a point between the lamp and resistance 128 of the preceding stage. In the quiescent state, as here described, the voltage at such anodes is slightly positive with respect to the voltage on their associated input diodes 146. In such condition the input diodes conduct.

Application of a positive voltage pulse for a short time duration on the order of about 1.6- microseconds via input lead 86 causes the diodes 146 to become back biased thereby presenting a high impedance. This causes the voltage at the cathode of diode 122a associated with the first stage to become more positive. An increased current flows through such diode thereby causing the potential at the control electrode of the associated silicon controlled rectifier 114a to become more positive. This increased potential turns on or causes the silicon controlled rectifier 114a to conduct. An increased current now passes through the associated resistor 128a and associated indicating lamp DP; the lamps filament is thereby heated to incandescene providing a visual indication of turn on.

There is thus an increase in potential at the junction between the resistor 124 and the resistor 128a associated with the now turned on stage. In addition, as the lamps filament heats up to incandescence, its electrical resistance increases significantly; this will also cause the potential at the just mentioned junction to increase further.

There will thus be a tendency to increase the potential at the anodes of diode 122k associated with the next succeeding stage to a value that would cause turn-on of the associated silicon controlled rectifier 11%. In order to prevent such rapid increase in potential at the anode of the diode 12212, a time delay circuit comprising a capacitor 148a plus resistors 124a, 128a provides a delay of substantially greater than the time duration of the pulse applied on lead 86.

When the voltage on lead 86 returns to normal ground potential value, the voltage to the anodes of diodes 146b and 122b of the next succeeding stage decreases in value to the value as held in the quiescent state.

Now, when the next succeeding positive pulse arrives on lead line 86 with the junction of resistor 128a and resistor 124a being now much more positive than previously, the next succeeding silicon controlled rectifier 1141; will be triggered to its conducting state in the same manner as described previously in connection with the first stage; this will cause the next succeeding digit indicating lamp Ts to be turned on, or illuminated.

Application of a positive CLEAR or RESET pulse on lead 72 causes the PNP transistor 156 to turn oif, thereby cutting ofi anode current to all the silicon controlled rectifiers; those rectifiers in the on condition will be turned oif and, accordingly, the associated lamps will be extinguished.

There has been shown and described an apparatus for visually indicating the digit positions of numerals entered into a data handling apparatus from a keyboard. The present invention has been described with reference to a ten-key keyboard; such a keyboard assumes that the base ten is used for positional notation for each of the digit indicating lamps. It should be clear that the foregoing principles are equally applicable for a data entry keyboard in which other numerical bases are utilized such as, for example, the binary system utilizing the base two. In such a binary system, the lamp U would have the positional value of 2, the lamp T would have the positional value 4, etc.

What is claimed is:

1. In an apparatus having a plurality of manually operable first switch means, individual ones of said plurality of switch means being representative of one of the numerals of a set of N numerals, and a second switch means being representative of a symbol separating whole portions from fractional portions of a number, the improvement comprising:

a first plurality of visual indicator means, individual ones of which are representative of one of the digit positions of the whole portion of a number;

a second plurality of visual indicator means, individual ones of which are representative of one of the digit positions of the fraction portion of a number;

a sole third visual indicator means representative of a symbol separating whole portions from fractional portions of a number;

each of said visual indicator means being individually changeable between a first visual indicating condition and a second visual indicating condition, each of said visual indicator means being normally in said first visual indicating condition;

first means for placing said third visual indicator means in its second condition in response to operation of said second switch means;

second means for placing successive ones of said first visual indicator means in their second condition in response to operation of successive ones of said first switch means prior to operation of said second switch means;

third means for placing successive ones of said second visual indicator means in their second condition in response to operation of successive ones of said first switch means subsequent to operation of said second switch means.

2. In the apparatus according to claim 1 wherein said each of said first switch means includes means for generating a first signal upon operation of any of said first switch means;

first control means switchable between a first stable state and a second stable state;

first gate means for transmitting second signals in response to said first signals when said first control means is in said first state;

second gate means for transmitting third signals in response to said first signals when said first control means is in said second state;

first and second register means each having a plurality of states, individual ones of the stages of said first register being associated with individual ones of said first plurality of visual indicator means, individual ones of the stages of said second register means being associated with individual ones of said second plurality of visual indicator means, each of said stages being switchable between a first state wherein the visual indicator means associated with the stage is in its second condition and a second state wherein the visual indicator means associated with the stage is in its first condition, said first register means being responsive to successive ones of said second signals for changing successive ones of its stages to said second state;

said second register means being responsive to successive ones of said third signals for changing successive ones of its stages to said second state.

3. In combination a plurality of manually operable numeral indicative first switch means, at least one manually operable digit order indicative second switch means;

a plurality of electrically operated lamps for visually indicating operation of said first and second switch means; and

lamp illumination control means for illuminating successive ones of a first portion of said lamps in response to a first succession of operations of any of said plurality of first switch means, said first succession being prior to operation of said second switch means, said lamp illumination control means including means responsive to the operation of said second switch means for illuminating successive ones of a second portion of said lamps in response to a second succession of operations of any of said plurality of first switch means subsequent to operation of said second switch means.

4. In the combination according to claim 3 wherein said lamp illumination control means includes means responsive to operation of said second switch means for illuminating a predetermined one of said lamps.

5. In an apparatus having a plurality of manually operable first switch means, individual one sof said plurality of switch means being representative of one of the numerals of a set of N numerals, and a second switch means being representative of a symbol separating whole portions from fractional portions of a number, the improvement comprising;

a plurality of first lamps, individual ones of which are representative of one of the digit positions of the whole portion of a number;

a plurality of second lamps, individual Ones of which are representative of one of the digit positions of the fraction portion of a number;

a sole third lamp means representative of a symbol separating whole portions from fractional portions of a number;

first means for illuminating said third lamp in response to operation of said second switch means;

second means for illuminating successive ones of said plurality of first lamps in response to successive operation of ones of said plurality of first switch means prior to operation of said second switch means;

third means for illuminating successive ones of said plurality of second lamps in response to successive operation of ones of said plurality of first switch means subsequent to operation of said second switch means.

6. In the apparatus according to claim 5 wherein said each of said first switch means includes means for generating a first signal upon operation of any of said first switch means;

wherein said first, second and third lamp illuminating means comprises:

first control means switchable between a first stable state and a second stable state;

first gate means for transmitting second signals in response to said first signals when said first control means is in said first state;

second gate means for transmitting third signals in response to said first signals when said first control means is in said second state;

first and second register means each having a plurality of stages, individual ones of the stages of said first register being associated with individual ones of said first lamps, individual ones of the stages of said second register means being associated with individual ones of said second lamps, each of said stages being switchable between a first state wherein the lamp associated with the stage is in an illuminating condition, said first register means being responsive to successive ones of said second signals for changing successive ones of its stages to said second state;

said second register means being responsive to successive ones of said third signals for changing successive ones of its stages to said second state.

7. In the combination according to claim 4 wherein there is further included third switch means; and said lamp illumination control means being responsive to operation of said third switch means for extinguishing substantially simultaneously those lamps previously illuminated by operation of any of said plurality of manually operable numeral indicative first switch means and said manually operable digit order indicative second switch means.

8. In an apparatus having first and second switch means, the combination comprising:

a plurality of indicator means, said plurality being divided into a first portion and a second portion, each of said indicator means being changeable between a first indicating state and a second indicating state;

means for changing the state of successively different ones of said indicator means from said first state to said second state in response to successive operations of said first switch means, said state changing means normally elfecting indicator state changing of the indicator means of said first portion, said state changing means being responsive to operation of said second switch means for effecting indicator state changing of the indicator means of said second portion; said state changing means comprising:

means for generating a first signal upon operation of any of said first switch means;

means for generating a second signal upon operation of said second switch means;

first gate means;

second gate means;

bistable control means for placing either one of said gate means in a signal transmissive condition while placing the other one of said gate means in a signal blocking condition;

said first gate means transmitting a third signal in response to said first signal when in said signal transmissive condition;

said second gate means transmitting a fourth signal in response to said first signal when in said signal transmissive condition;

said bistable control means being responsive to said second signal for placing said first gate means in a signal blocking condition while placing said second gate means in a signal transmissive condition;

a first multistage means;

a second multistage means;

individual stages of each of said multistage means being associated with individual ones of said plurality of indicator means;

each stage being changeable between a first condition wherein the indicator means associated therewith is placed in its first indicating state and a second condition wherein the indicator means associated therewith is placed in its second indicating condition;

said first multistage means being responsive to suecessive third signals for changing successive ones of its stages from said first state to' said second state, the stages of said first multistage means previously placed in said second state remaining in said second state;

said second multistage means being responsive to suecessive fourth signals for changing successive ones of its stages from said first state to said second state, the stages of said second multistage means previously placed in said second state remaining in said second state.

9. In an apparatus according to claim wherein said second gate means also transmits said fourth signal in response to said second signal.

10. In an apparatus according to claim 11 wherein there is further included:

third gate means;

second control means for placing said third gate means in a signal transmissive condition or a signal blocking condition, said second control means being changeable between a first stable condition wherein said third gate means is in said signal transmissive condition, and a second stable condition wherein said third gate means is in said signal blocking condition; said third gate means transmitting a fifth signal in response to said second signal when in said signal transmissive condition;

said bistable control means being responsive to said fifth signal for changing from said first condition to said second condition.

11. In an apparatus according to claim 10 wherein said state changing means comprises a plurality of stages, in-

dividual ones of said stages includes a silicon controlled rectifier; individual ones of said silicon controlled rectifiers being in circuit with an associated indicator means, a source of electrical power and at least one other silicon controlled rectifier;

said first switch means being arranged and adapted to generate an electrical signal upon each operation thereof;

means for applying said electrical signals to each of said silicon controlled rectifiers;

a first one of said silicon controlled rectifiers responding to the first one of said electrical signals to place its associated indicator means in said second state;

successive ones of said silicOn controlled rectifiers conditioning succeeding ones of said silicon controlled rectifiers to respond to succeeding ones of said electrical signals.

References Cited UNITED STATES PATENTS 1,054,336 2/1913 Brown 340337 2,275,797 3/ 1942 New 340325 2,307,660 1/ 1943 Bascom 340-379 2,467,419 4/ 1949 Avery 235-61 2,935,250 5/1960 Reppert 235-60.15

DONALD J. YUSKO, Primary Examiner M. M. CURTIS, Assistant Examiner Us. 01. X.R.

UNITED STATES PATENT OFFICE CERTIFICATE OF CORRECTION Patent No. 3,526,887 Dated September 1, 1970 Inventor(s) E. R. Erni It is certified that error appears in the above-identified patent and that said Letters Patent are hereby corrected as shown below:

Column 1, line 37: after "order" change "to" to of .1

Column 2, line 31: change "ten-day" to ten-key Column 6, line 46: change "pulse" to pulses oolumn 9, line 54: change "incandescene" to incandescence Column ll, line 40: change "one sof" to ones of Column 12, line 13, after "an" and before "illuminating" with the stage is in an Signed and sealed this 22nd day of June 1 971 (SEAL) Atte st:

EDWARD M.FLE'ICHER,JR. Attesting Officer WILLIAM E. SCHUYLER, JR. Commissioner of Patents 

